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2.3GHz to 2.7GHz MIMO Wireless Broadband
RF Transceiver
Receiver (Rx) Calibration or Loopback
Part of Rx and Tx circuit blocks except LNA and PA dri-
ver are powered on and active. The transmitter I/Q
input signals are upconverted to RF, and the output of
the Tx gain control block (VGA) is fed to the receiver at
the input of the downconverter. Either receiver A or
both receivers can be connected to the transmitter and
powered on. The I/Q lowpass filters are not present in
the transmitter signal path (they are bypassed).
Programmable Registers
and 4-Wire SPI Interface
The MAX2839 includes 32 programmable 16-bit regis-
ters. The most significant bit (MSB) is the read/write
selection bit. The next 5 bits are register address. The
DOUT
10 least significant bits (LSBs) are register data.
Register data is loaded through the 4-wire
SPI/MICROWIRE?-compatible serial interface. Data at
DIN is shifted in MSB first and is framed by CS . When
CS is low, the clock is active, and input data is shifted
at the rising edge of the clock. During the read mode,
register data selected by address bits is shifted out to
DOUT at the falling edges of the clock. At the CS rising
edge, the 10-bit data bits are latched into the register
selected by address bits. See Figure 1. The register
values are preserved in shutdown mode as long as the
power-supply voltage is maintained. However, every
time the power-supply voltage is turned on, the regis-
ters are reset to the default values.
DON'T CARE
DIN
BIT 1
BIT 2
BIT 5
BIT 6
BIT 13
BIT 14
SCLK
t CH
t CS1
CS
t DS
t CL
t CSO
t CSS
t DH
t CSH
t CSW
SPI REGISTER WRITE
DOUT
DON'T CARE
BIT 6
BIT 13
BIT 14
t D
DIN
BIT 1
BIT 2
BIT 5
DON'T CARE
SCLK
CS
SPI REGISTER READ
Figure 1. 4-Wire SPI Serial-Interface Timing Diagram
MICROWIRE is a trademark of National Semiconductor Corp.
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